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ld75 16c 08 / 31 / 201 6 1 leadtrend technology corporation www.leadtrend.com.tw ld75 16 c - d s - 0 1 august 201 6 primary side quasi - resonant controller operating in cv/cc mode rev . 0 1 general description the ld75 16c is an excellent primary side feedback mos controller with cv/cc operation, integrated with several functions of protections. it minimizes the component counts and is available in a tiny sot - 26 package. those make it an ideal design for low cost applications. it provides functions of ultra - low startup current, green - mode power - saving operation and leading - edge blanking of the current sensing. also, the ld 75 16c features internal otp (over temperature protection) and ovp (over voltage protection) to prevent the circuit from being damaged due to abnormal conditions. in most cases, the power supply with primary - side feedback controller would accompany with som e serious load regulation effect. to deal with this problem, the ld75 16c consists of dedicated load regulation compensation circuit to enhance its performance. feature s ? primary - side feedback control w ith q uasi - resonant operation ? 120ma/ - 200ma unbalanced mos driving capability ? constant voltage within ? 5% ? built - in adjustable load regulation compensation ? constant current control ? ultra - low startup current (<1. 5 ? a ) ? 0. 65 m a low operating current a t light load ? 75 k h z maximum switching frequency . ? current mode co ntrol ? green mode control improve efficiency ? leb ( leading - edge blanking ) o n cs pin ? built - in soft start ? vcc ovp ( over voltage protection ) ? fb pin open / short protection ? internal otp (over temperature protection) applications ? mobile phone adapter ? lower power ac/dc adapter typical application v c c a c i n p u t d c o u t p u t e m i f i l t e r o u t c s c o m p l d 7 5 1 6 c g n d f b
ld75 16c 08/31 /201 6 2 leadtrend technology corporation www.leadtrend.com.tw ld75 16c - d s - 0 1 august 2016 pin configuration order ing information part number package t op mark shipping ld75 16c gl sot - 26 ywp/ 16c 3000 / tape & reel the ld75 16c is rohs compliant /g reen packaged protection mode part number v cc_ovp fb_uvp otp (internal) ld 7516c auto - restart auto - restart auto - restart pin descriptions pin name function 1 vcc supply voltage pin. 2 gnd ground. 3 fb auxiliary voltage sense and quasi resonant detecti on. 4 cs current sense pin, connect to sense the switch current. 5 comp output of the error amplifier for voltage compensation. 6 out gate drive output to drive the external mos switch. sot - 26 (top view) yy, y : year code (d: 2004, e: 2005 ..) ww, w : week code pp : production code p 1 6c : ld75 1 6c 1 2 3 4 5 6 vcc gnd fb out comp cs y w p 1 6c pp
ld75 16c 08/31 /201 6 3 leadtrend technology corporation www.leadtrend.com.tw ld75 16c - d s - 0 1 august 2016 block diagram v c c f b c o m p o u t g n d c s u v l o o n / o f f p g l d o i n t e r n a l s u p p l y v c c o v p p w m l o g i c g m v r e f v c o m p s / h q r d m a x . f s w a n d g r e e n m o d e l o a d c o m p e n s a t i o n u v p c c c o n t r o l c v c o n t r o l l e b p r o t e c t i o n p r o t e c t i o n p r o t e c t i o n f b o p e n c c c o m p e n s a t i o n v c o m p p r o t e c t i o n g a t e d r i v e r + - i n t . o t p
ld75 16c 08/31 /201 6 4 leadtrend technology corporation www.leadtrend.com.tw ld75 16c - d s - 0 1 august 2016 absolute maximum ra tings supply voltage vcc, - 0.3v ~ 4 0v out - 0.3 v ~ vcc+0.3 v comp, fb, cs - 0.3 v ~ 4 . 0 v fb(ac current Q 3 ma ) - 0.7 v ~ 4 . 0 v maximum junction temperature 1 50 ? c storage temperature range - 6 5 ? c to 1 50 ? c package thermal resistance (sot - 26, ja ) 200 ? c /w power dissipation (sot - 26, at ambient temperature = 85 ? c ) 200mw lead temperature (soldering, 10sec) 260 ? c esd voltage protection, human body model 2.5 kv esd voltage protection, machine model 250 v caution: stress exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stress above recommended operating conditions may affect device reliability recommended operating conditions item min. max. unit operating junction temperature - 40 1 25 ? c supply vcc voltage 8 .5 1 7 v vcc capacitor 4.7 10 ? f start - up resistor value (ac side, half wave) 1m 6.6 m ? comp pin capacitor 470 4700 p f note: 1. it s essential to connect vcc pin with a smd ceramic capacitor (0.1 ? f~0.47 ? f) to filter out the undesired switching noise for stable operat ion. this capacitor should be placed close to ic pin as possible 2. connecting a capacitor to comp pin is also essential to filter out the undesired switching noise for stable operation. 3. the small signal components should be placed close to ic pin as possible .
ld75 16c 08/31 /201 6 5 leadtrend technology corporation www.leadtrend.com.tw ld75 16c - d s - 0 1 august 2016 electrical characteristics (t a = +25 ? c unless otherwise stated, v cc =1 2 .0v) parameter conditions sym. min typ max units supply voltage (vcc pin) startup current vcc=uvlo - on - 0.05v i cc _ st 0.14 1.0 1. 5 ? comp =0v, out=open, fb=2v i cc _ op2 0.55 0. 6 5 0.75 ma ovp/fb uvp tripped, fb=0v i cc _ opa 0.37 0. 50 0.62 ma uvlo (off) v cc _ off 5.5 6.0 6.5 v uvlo (on) v cc _ on 14 15 16 v vcc ovp level v cc _ ovp 27 29 31 v error amplifier (comp pin) reference voltage, v ref v ref 0.98 1 . 00 1.02 v output sink current v fb = 1.3v , v comp =2v* i comp _ sink 2 10 ? fb = 0.7v , v comp =2v* i comp _ source 2 10 ? comp = 2.5 v i l oad _ c omp 16 20 24 ? current sensing (cs pin) maximum input voltage v cs _ max 0.74 0.80 0.85 v minimum v cs - off v comp < 0.45v v cs _ min 70 100 1 30 m v leading edge blanking time * t leb 310 430 550 ns cc compensation current v comp >0.9v i cc 300 ? oscillator for switching frequency maximum frequency f sw _ max 65 75 85 khz green mode fr equency * f sw _ green 25 khz minimum frequency f sw _ min 0. 5 0. 70 0. 89 khz maximum on time t on _ max 18 ? feedback (quasi resonant detection, fb pin) qrd trip level * v qrd 150 mv hysteresis * v qrd _ hys 50 mv fb under voltage protection (uvp, fb pin) under voltage level v fb _ uvp 0.50 0.65 v uvp delay time at start - up* t d _ fbuvp _ ss 2 0 ms on chip otp (over temperature) otp level * t inotp 1 4 0 ? inotp _ hys 15 ? * : guaranteed by design.
ld75 16c 08/31 /201 6 6 leadtrend technology corporation www.leadtrend.com.tw ld75 16c - d s - 0 1 august 2016 typical performance characteristic s v cc - on (v) fig. 1 uvlo (on) vs. temperature temperature ( ? c) 1 2 .0 1 3 . 0 1 4 .0 1 5 . 0 1 6 .0 1 7 .0 - 40 0 40 80 120 125 v cc - off (v) temperature ( ? c) fig. 2 uvlo ( o ff ) vs. temperature 3 . 0 5 .0 6 .0 8 .0 4 . 0 - 40 0 40 80 120 125 7 .0 i cc - st ( ? a ) temperature ( ? c) fig. 3 start up current vs. temperature 0 . 5 1 . 0 2 . 0 0 . 0 - 40 0 40 80 120 125 1 . 5 f sw - max (khz) fig. 4 max frequency v s. temperature temperature ( ? c) - 40 60 65 70 75 80 86 0 40 80 120 125 f sw - green (khz) temperature ( ? c) fig. 5 green mode frequency vs. temperature 1 9 21 2 3 2 5 2 7 2 9 - 40 0 40 80 120 125 f sw - min (khz) temperature ( ? c) fig. 6 min frequency vs. temperature 0 . 4 0 . 5 0 . 6 0 . 7 0 . 8 0.9 - 40 0 40 80 120 125
ld75 16c 08/31 /201 6 7 leadtrend technology corporation www.leadtrend.com.tw ld75 16c - d s - 0 1 august 2016 v ref (v) temperature ( ? c) fig. 7 reference voltage vs. temperature - 40 0 40 80 120 125 0.98 . 0.99 1 .00 1.01 1 .0 2 0 .9 7 -40 -20 0 20 40 60 80 100 120 0 3 6 9 12 15 18 y axis title x axis title -40 -20 0 20 40 60 80 100 120 0 3 6 9 12 15 18 y axis title x axis title i load c omp ( ? a) temperature ( ? c) fig. 8 load compensation vs. temperature - 40 0 40 80 120 12 5 5 10 15 20 25 0 30 v cs - max (v) temperature ( ? c) fig. 9 v cs ( off ) vs. temperature 0. 7 4 0. 7 6 0. 7 8 0 . 8 0 0 . 8 2 0 . 8 4 - 40 0 40 80 120 125 v cc - ovp (v) temperature ( ? c) fig. 10 vcc ovp vs. temperature 2 6 27 28 29 30 31 - 40 0 40 80 120 125
ld75 16c 08/31 /201 6 8 leadtrend technology corporation www.leadtrend.com.tw ld75 16c - d s - 0 1 august 2016 application information operation overview the ld75 16c is an excellent primary side feedback controller with quasi - resonant operation to provide high efficiency. the ld75 16c removes the need for secondary feedback circuits wh ile achieving excellent line and load regulation. i t meets the green - power requirement and is intended for the use in those modern switching power suppliers and linear adaptors that demand higher power efficiency and power - saving. it integrates with more f unctions to reduce the external components counts and the size. m ajor features are described as below. under voltage lockout (uvlo) an uvlo comparator is implemented in it to detect the voltage across vcc pin. it would assure the supply voltage enough to t urn on the ld75 16c and further to drive the power mos . as shown in fig. 1 1 , a hysteresis is built in to prevent shutdown from voltage dip during startup. fig. 1 1 startup current and startup circuit t he typical startup ci rcuit to generate vcc of the ld75 16c is shown in fig. 1 2 . at startup transient , the vcc i s below the uvlo (on) threshold, so there s no pulse deliver ed out from ld75 16c to drive the power mos . therefore, the current through r1 will be used to charge the cap acitor c1. until the vcc is fully charged to deliver the drive - out signal, the auxiliary winding of the transformer will provide supply current . lower startup current requirement on the pwm controller will help to increase the value of r1 and then reduce the power consumption on r1. by using cmos process and some unique circuit design, the ld75 16c requires only 1.9 ? a max to start up. higher resistance of r1 will spend much more time to start up. t he user is recommended to select proper value of r1 and c1 t o optimize the power consumption and startup time. fig. 1 2 vcc uvlo ( on ) uvlo ( off ) t t i ( vcc ) operating current ( ~ ma ) startup current ( ~ a ) e m i f i l t e r r 1 o u t c s v c c g n d l d 7 5 1 6 c a c i n p u t c 1 c b u l k d 1
ld75 16c 08/31 /201 6 9 leadtrend technology corporation www.leadtrend.com.tw ld75 16c - d s - 0 1 august 2016 principle of cv operation in the dcm flyback converter, it can sense the output voltage from auxiliary winding. ld75 16c s amples the auxiliary winding on the prim ary - side to regulate the output voltage, as shown in the fig. 1 3 . the voltage induced in the auxiliary winding is a reflection of the secondary winding voltage while the mos is in off state. via a resistor divider connected between the auxiliary winding an d fb pin, the auxiliary voltage is sampled after the sample delay time which is defined as 30~50% of secondary current discharge time from previous cycle . a nd will be hold until the next sampling period . the sampled voltage is compared with an internal ref erence v ref ( 1 . 0 v) and the error will be amplified. the error amplifier output comp reflects the load condition and controls the duty cycle to regulate the output voltage, thus constant output voltage can be achieved. the output voltage is given as: where v f indicates the drop voltage of the output d iode , ra and rb are top and bottom feedback resistor value, ns and na are the turns of transformer secondary and auxiliary . in case that the output voltage is sensed through the auxiliar y winding; the leakage inductance will induce ringing to affect output regulation. to optimize the collector voltage clamp circuit will minimize the high frequency ringing and achieve the best regulation. fig . 1 4 shows the desired collector voltage wavefor m in compare to those with large undershoot due to leakage inductance induced ring (fig. 1 5 ) . th e ringing may make the sample error and cause poor performance for output voltage regulation. a proper selection for resistor rs, in series with the clamp diode , may reduce any large undershoot, as shown in fig. 1 6 . fig. 1 3 fig.1 4 fig.1 5 fig.1 6 f out v na ns rb ra v v ? ? ? ) )( 1 ( 0 . 1 o u t c s c o m p f b n a n s n p r a r b v i n s / h v r e f + - d r i v e r l d 7 5 1 6 c v d s t h e o v e r s h o o t h e r e i s m i n o r v d s t h e u n d e r s h o o t w o u l d m a k e t h e s a m p l e e r r o r . o u t c s c o m p f b n a n s n p r a r b v i n l d 7 5 1 6 c r s
ld75 16c 08/31 /201 6 10 leadtrend technology corporation www.leadtrend.com.tw ld75 16c - d s - 0 1 august 2016 load regulation compensation ld75 16c is implement ed with load regulation compensation to compensate the cable voltage drop and to achieve a better voltage regulation . the offset voltage across fb is produced by the internal sink current source during the sampling period . the internal sink current source is proportional to the value of v comp to compensate the cable loss as shown in fig. 1 7 . so, the offset voltage will decrease as the v comp decreases from full - load to no - load. it is programmable by adjusting the resistance of the voltage divider to compensat e the drop for cable lines used in various conditions . the equat ion of internal sink current is shown as: the compe n sation current versus v comp is shown as: fig. 1 7 q uasi - r esonant mode detection the l d75 16c employs quasi - re sonant (qr) switching scheme to switch in valley - mode either in cv or cc operation. this will greatly reduce the switching loss and the ratio dv/dt in the entire operating range for the power supply. fig. 18 shows the typical qr dete ction block . the qr detection block will detect auxiliary winding signal to drive mos as fb pin voltage drops to 0. 1 5 v. the qr comparator will not activate if fb pin voltage remains above 0. 2 v. fig. 18 multi - mode operation t he ld75 16c is a qr controller operating in multi - mode s . the controller changes operation mode s according to line voltage and load conditions. at heavy - load (v comp >1. 6 v, fig . 19 ), there might be two situations to meet. if the system ac input is in low lin e, the ld75 16c will turn on in first valley. if in high line, the switching frequency will increase till over the limit of 75 khz and skip the first valley to turn on in 2 nd , 3 rd .valley. the switching frequency would var y depending on the line voltage and the load conditions when the system is operated in qr mode . at mediu m or light load conditions (0 . 7 v ld75 16c 08/31 /201 6 11 leadtrend technology corporation www.leadtrend.com.tw ld75 16c - d s - 0 1 august 2016 fig. 19 current sensing an d leading - edge blanking the typical current mode of pwm controller feedbacks both current signal and voltage signal to close the control loop and achieve regulation. as shown in fig. 2 0 , the ld75 16c detects the primary mos current from the cs pin, which i s not only for the peak current mode control but also for the pulse - by - pulse current limit. the maximum voltage threshold of the current sensing pi n is set at 0.8 v. from above, the mos peak current can be obtained from below. a lead ing - edge blanking (leb) time is included in the input of cs pin to prevent the false - trigger from the turn - on current spike. ld 75 16c d eliver s more constant current at high input voltage than at low input voltage . to compensate it , an offset volt age is added to the r s signal by an internal current source (i c c ) and an external resistor (r 1 ) in series between the sense re sistor ( rs) and the cs pin , by selecting a proper value of the resistor in series with the cs pin, the amount of compensation c an be adjusted. the value of i c c (300 a) depends on the comp voltage( v comp > 1.2 v ) . the equa tion of i c c (300 a) is decreased as: fig. 20 principle of c.c. operation t he p rimary side control scheme is applied to eliminate seco ndary feedback circuit or o p to - coupler, which will reduce the system cost. the switching waveforms are shown in fig. 2 1 . t he output current i o can be expressed as: the primary peak current ( i p , p k ) , inductor current discharge time ( t dis ) and switching period (t s ) can be detected by the ic . t he ratio of v cs* t dis /t s will be modulate d as a constant (v cs* t dis /t s =1/3). so that i o can be obtained as however this is an approximat e equation. the user may fine - tune it according to the experiment result. q u a s i r e s o n a n t ( f i r s t v a l l e y ) d i s c o n t i n u o u s w i t h v a l l e y s w i t c h i n g ( 2 n d , 3 r d , 4 t h . . . v a l l e y ) 2 5 k h z 0 . 7 k h z 7 5 k h z v c o m p f s g r e e n m o d e 1 . 2 v 0 . 7 v 0 . 3 v 1 . 6 v s peak(max) r 0.8v i ? o u t c s c o m p f b n a n s n p r a r b v i n l d 7 5 1 6 c l e b t i m e r 1 r s v c s v s s dis cs cs s p dis pk p, s p s dis pk s, t t r v n n 2 1 ts t i n n 2 1 t t i 2 1 io ? ? ? ? ? ? ? ? 3 1 r 1 n n 2 1 t t r v n n 2 1 io s s p s dis s cs s p ? ? ? ? ? ? ) 300 ( 1 r a v v s cs ? ? ? ?
ld75 16c 08/31 /201 6 12 leadtrend technology corporation www.leadtrend.com.tw ld75 16c - d s - 0 1 august 2016 fig. 2 1 ovp (over voltage protection) on vcc C auto recovery ld75 16c is implemented with ovp function through vcc. as the vcc voltage rises over the ovp threshold voltage, the output driv e circuit will be shut off simultaneously thus to stop the switching of the power mos until the next uvlo(on) arrives. the vcc ovp function of ld75 16c is an auto - recovery type protection. t he fig. 2 2 shows its operation. that is, if the ovp condition is re moved, it will resume to normal output voltage and v cc level in normal condition. fig. 2 2 fb un der voltage protection (fb uvp) & fb short circuit protection C auto recovery ld75 16c is implemented with an uvp function over f b pin. if the fb voltage falls below uvp level over the delay time, the protection will be activated to stop the switching of the power mos until the next uvlo(on) arrives. the fb uvp function in ld75 16c is an auto - recovery type protection. t he fig. 2 3 sho ws its operation. during the soft start period, the fb uvp is disabled. to avoid output over voltage in soft start period. the fig. 2 4 shows the opera tion. while fb is short to gnd, fb pin keeps in zero voltage level. if fb cannot detect any voltage signal over 0. 15 v in the beginning of soft start period, then the soft start will turn to generate a driving signal every 4ms until fb uvp d elay to shut down ic and auto recovery . fig. 2 3 f ig. 2 4 o u t i p i s i p , p k i s , p k t o n t d i s t s v c c u v l o ( o n ) u v l o ( o f f ) t o v p t r i p p e d t o u t s w i t c h i n g s w i t c h i n g n o n - s w i t c h i n g o v p l e v e l f b u v p l e v e l t f b u v p t r i p p e d t o u t s w i t c h i n g s w i t c h i n g n o n - s w i t c h i n g v c c t f b u v p d e l a y t i m e u v l o ( o n ) u v l o ( o f f ) s o f t s t a r t + f b u v p d e l a y t i m e f b f b s h o r t l e v e l t f b s h o r t t c s n o n - s w i t c h i n g v c c t u v l o ( o n ) u v l o ( o f f ) s o f t s t a r t + f b u v p d e l a y t i m e o u t t
ld75 16c 08/31 /201 6 13 leadtrend technology corporation www.leadtrend.com.tw ld75 16c - d s - 0 1 august 2016 pack age information sot - 26 symbol dimension in millimeters dimensions in inches min max min max a 2.692 3.099 0.106 0.122 b 1.397 1.803 0.055 0.071 c ------- 1.450 ------- 0.057 d 0.300 0.5 00 0.012 0.020 f 0.95 typ 0.037 typ h 0.080 0.254 0.003 0.010 i 0.050 0.150 0.002 0.006 j 2.600 3.000 0.102 0.118 m 0.300 0.600 0.012 0.024 0 10 0 10 i mportant notice leadtrend technology corp. reserves the right to make changes or corrections to its products at any time without notice. cust omers should verify the datasheets are current and complete before placing order.
ld75 16c 08/31 /201 6 14 leadtrend technology corporation www.leadtrend.com.tw ld75 16c - d s - 0 1 august 2016 r e vision history rev . d a te change notice 00 0 6 / 0 5 / 2015 original specification . 01 08/31 /201 6 1. modified i l oad _ comp ( was i fb ) test condition from v comp =3.0v to 2.5v, and revise the application note i l oad _ comp equation and v comp vs i l oad _ comp curve (fig.17), due to mark error. t he field tests still the same. 2. modified f sw_min from 0.56 khz to 0.5 khz, due to mark error. t he field tests still the same.

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